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? 2016 microchip technology inc. ds20005533a-page 1 mcp2557fd/8fd features silent mode is useful in the following applications: - disables transmitter in redundant systems - implements babbling idiot protection - tests connection of bus medium - prevents a faulty can controller from disrupting all network communications optimized for can fd at 2, 5 and 8 mbps operation: - maximum propagation delay: 120 ns - loop delay symmetry: 10%(2 mbps) meets or exceeds stringent automotive design requirements including hardware require- ments for lin, can and flexray interfaces in automotive applications, version 1.3, may 2012: - conducted emissions at 2 mbps with common-mode choke (cmc) - dpi at 2 mbps with cmc meets sae j2962/2 communication transceiv- ers qualification requirements C can - passes radiated emissions at 2 mbps without a cmc meets latest iso/dis-11898-2:2015 meets latest sae j2284-4 and -5 working drafts digital inputs of the mcp2557fd are compatible to 3.3v and 5v microcontrollers. r xd output requires a 5v tolerant microcontroller input functional behavior predictable under all supply conditions: - device is in unpowered mode if v dd drops below power-on reset (por) level - device is in unpowered mode if v io drops below por level applications can 2.0 and can fd networks in automotive, industrial, aerospace, medical, and consumer applications. description the mcp2557fd/8fd can transceiver family is designed for high-speed can fd applications with up to 8 mbps communication speed. the maximum prop- agation delay was improved to support longer bus length. the device meets automotive requirements for can fd bit rates exceeding 2 mbps, low quiescent current, electromagnetic compatibility (emc) and electrostatic discharge (esd). package types mcp2557fd/8fd family members mcp2558fd soic v dd v ss r xd canhcanl 1 2 3 4 8 7 6 5 v io s t xd mcp2557fd soic v dd v ss r xd canhcanl nc s t xd mcp2557fd 2x3 tdfn* mcp2558fd 2x3 tdfn* v dd v ss r xd canhcanl 1 2 3 4 8 7 6 5 nc s t xd v dd v ss r xd canhcanl v io s t xd mcp2558fd 3x3 dfn* mcp2557fd 3x3 dfn* v dd v ss r xd canhcanl nc s t xd v dd v ss r xd canhcanl v io s t xd 1 2 3 4 8 7 6 5 ep 9 1 2 3 4 8 7 6 5 ep 9 1 2 3 4 8 7 6 5 ep 9 1 2 3 4 8 7 6 5 ep 9 *includes exposed thermal pad (ep); see ta b l e 1 - 1 . device v io pin nc ttl i/o v io i/o description mcp2557fd n/a yes yes n/a mcp2558fd yes n/a n/a yes internal level shifter on digital i/o pins. note: for ordering information, see the product identification system section. can fd transceiver with silent mode downloaded from: http:///
mcp2557fd/8fd ds20005533a-page 2 ? 2016 microchip technology inc. block diagram note: only the mcp2558fd has the v io pin. in the mcp2557fd, the supply for the digital i/o is internally connected to v dd . v dd canh canl t xd r xd driver and slope control thermal protection por uvlo digital i/o supply v io v ss s permanent dominant detect v io v io mode control canh canl hs_rx v dd downloaded from: http:///
? 2016 microchip technology inc. ds20005533a-page 3 mcp2557fd/8fd 1.0 device overview the mcp2557fd/8fd can transceiver family is designed for high-speed can fd applications with up to 8 mbps communication speed. the product offers a silent mode controlled by the silent mode pin. the silent mode is used to disable the can transmitter. this ensures that the device doesnt drive the can bus. the mcp2557fd/8fd device provides differential transmit and receive capability for the can protocol controller, and is fully compatible with specification iso/dis-11898-2:2015. the loop delay symmetry is tested to support data rates that are up to 8 mbps for can fd (flexible data rate). the maximum propagation delay was improved to support longer bus length. typically, each node in a can system must have a device convert the digital signals generated by a can controller to signals suitable for transmission over the bus cabling (differential output). it also provides a buffer between the can controller and the high-voltage spikes that can be generated on the can bus by outside sources. 1.1 transmitter function the can bus has two states: dominant and recessive. a dominant state occurs when the differential voltage between canh and canl is greater than v diff ( d )( i ). a recessive state occurs when the differential voltage is less than v diff ( r )( i ). the dominant and recessive states correspond to the low and high states of the t xd input pin, respectively. however, a dominant state initiated by another can node will override a recessive state on the can bus. 1.2 receiver function the r xd output pin reflects the differential bus voltage between canh and canl. the low and high states of the r xd output pin correspond to the dominant and recessive states of the can bus, respectively. 1.3 internal protection canh and canl are protected against battery short circuits and electrical transients that can occur on the can bus. this feature prevents destruction of the transmitter output stage during such a fault condition. the device is further protected from excessive current loading by thermal shutdown circuitry that disables the output drivers when the junction temperature exceeds a nominal limit of +175c. all other parts of the chip remain operational, and the chip temperature is lowered due to the decreased power dissipation in the transmitter outputs. this protection is essential to guard against bus line short- circuit-induced damage. thermal protection is only active during normal mode. 1.4 permanent dominant detection the mcp2557fd/8fd device prevents a permanent dominant condition on t xd . in normal mode, if the mcp2557fd/8fd detects an extended low state on the t xd input, it will disable the canh and canl output drivers in order to prevent data corruption on the can bus. the drivers will remain disabled until t xd goes high. the high-speed receiver is active, and data on the can bus is received on r xd . the condition has a time-out of 1.9 ms (typical). this implies a maximum bit time of 128 s (7.8 khz), allowing up to 18 consecutive dominant bits on the bus. 1.5 power-on reset (por) and undervoltage detection the mcp2557fd/8fd have por detection on both supply pins, v dd and v io . typical por thresholds to deassert the reset are 1.2v and 3.0v for v io and v dd , respectively. when the device is powered on, canh and canl remain in a high-impedance state until v dd exceeds its undervoltage level. once powered on, canh and canl will enter a high-impedance state if the voltage level at v dd drops below the undervoltage level, providing voltage brown-out protection during normal operation. the receiver output is forced to a recessive state during an undervoltage condition on v dd . downloaded from: http:///
mcp2557fd/8fd ds20005533a-page 4 ? 2016 microchip technology inc. 1.6 mode control figure 1-1 shows the state diagram of the mcp2557fd/ 8fd. 1.6.1 unpowered mode (por) the mcp2557fd/8fd enters unpowered mode if any of the following conditions occur: after powering up the device if v dd drops below v porl if v io drops below v porl _v io in unpowered mode, the can bus will be biased to ground using a high impedance. the mcp2557fd/ 8fd is not able to communicate on the bus. 1.6.2 wake mode the mcp2557fd/8fd transitions from unpowered mode to wake mode when v dd and v io are above their porh levels. from normal mode, if v dd is smaller than v uvl , or if the bandgap output voltage is not within valid range, the device will also enter wake mode. in wake mode, the can bus is biased to ground and r xd is always high. 1.6.3 normal mode when v dd exceeds v uvh , the band gap is within valid range and t xd is high, the device transitions into normal mode. during por, when the microcontroller powers up, the t xd pin could be unintentionally pulled down by the microcontroller powering up. to avoid driving the bus during a por of the microcontroller, the transceiver proceeds to normal mode only after t xd is high. in normal mode, the driver block is operational and can drive the bus pins. the slopes of the output signals on canh and canl are optimized to reduce electromagnetic emissions (eme). the can bus is biased to v dd /2. the high-speed differential receiver is active. 1.6.4 silent mode the device may be placed in silent mode by applying a high level to the s pin (pin 8). in silent mode, the transmitter is disabled and the can bus is biased to v dd /2. the high-speed differential receiver is active. the can controller must put the mcp2557fd/8fd back into normal mode to enable the transmitter. downloaded from: http:///
? 2016 microchip technology inc. ds20005533a-page 5 mcp2557fd/8fd figure 1-1: mcp2557fd/8fd state diagram silent high bandgap not ok or v dd < v uvl and bandgap not ok or v dd < v uvl txd high and bandgap ok and v dd > v uvh and silent low silent low silent high t xd high and t < tj(sd)-tj(hyst) t xd low > tpdt or t > tj(sd) v dd < v porl or v io < v porl _v io v dd > v porh and v io > v porh _v io normal can driven common mode v dd /2 hs rx on r xd = f(hs rx) t xd time-out can recessive common mode v dd /2 hs rx on r xd = f(hs rx) unpowered (por) can high impedance common mode tied to gnd hs rx off r xd high bandgap off from any state wake start bandgap can high impedance common mode tied to gnd hs rx off rxd high silent can recessive (tx off) common mode v dd /2 hs rx on rx d = f(hs rx) downloaded from: http:///
mcp2557fd/8fd ds20005533a-page 6 ? 2016 microchip technology inc. 1.7 pin descriptions the descriptions of the pins are listed in tab l e 1 - 1 . 1.7.1 transmitter data input pin (t xd ) the can transceiver drives the differential output pins canh and canl according to t xd . it is usually connected to the transmitter data output of the can controller device. when t xd is low, canh and canl are in the dominant state. when t xd is high, canh and canl are in the recessive state, provided that another can node is not driving the can bus with a dominant state. t xd is connected from an internal pull- up resistor (nominal 33 k ? ) to v dd or v io , in the mcp2557fd or mcp2558fd, respectively. 1.7.2 ground supply pin (v ss ) ground supply pin. 1.7.3 supply voltage pin (v dd ) positive supply voltage pin. supplies transmitter and receiver. 1.7.4 receiver data output pin (r xd ) r xd is a cmos-compatible output that drives high or low depending on the differential signals on the canh and canl pins, and is usually connected to the receiver data input of the can controller device. r xd is high when the can bus is recessive, and low in the dominant state. r xd is supplied by v dd or v io , in the mcp2557fd or mcp2558fd, respectively. 1.7.5 nc pin (mcp2557fd) no connect. this pin can be left open or connected to v ss . 1.7.6 v io pin (mcp2557fd) supply for digital i/o pins. in the mcp2557fd, the supply for the digital i/o (t xd , r xd and s) is internally connected to v dd . 1.7.7 digital i/o the mcp2557fd/8fd enable easy interfacing to mcus with i/o ranges from 1.8v to 5v. 1.7.7.1 mcp2557fd the v ih ( min ) and v il ( max ) for t xd are independent of v dd . they are set at levels that are compatible with 3v and 5v microcontrollers. the r xd pin is always driven to v dd ; therefore, a 3v microcontroller will need a 5v tolerant input. 1.7.7.2 mcp2558fd v ih and v il for s and t xd depend on v io . the r xd pin is driven to v io . 1.7.8 can low pin (canl) the canl output drives the low side of the can differential bus. this pin is also tied internally to the receive input comparator. canl disconnects from the bus when the mcp2557fd/8fd devices are not powered. 1.7.9 can high pin (canh) the canh output drives the high side of the can differential bus. this pin is also tied internally to the receive input comparator. canh disconnects from the bus when the mcp2557fd/8fd devices are not powered. table 1-1: mcp2557fd/8fd pin descriptions mcp2557fd 3x3dfn, 2x3tdfn mcp2557fd soic mcp2558fd 3x3dfn, 2x3tdfn mcp2558fd soic symbol pin function 1111 t xd transmit data input 2222 v ss ground 3333 v dd supply voltage 4444 r xd receive data output 5 5 nc no connect ( mcp2557fd only) 5 5 v io digital i/o supply pin ( mcp2558fd only) 6666 c a n l c a n l o w - l e v e l v o l t a g e i / o 7777 c a n h c a n h i g h - l e v e l v o l t a g e i / o 8888 s s i l e n t m o d e i n p u t 9 9 ep exposed thermal pad downloaded from: http:///
? 2016 microchip technology inc. ds20005533a-page 7 mcp2557fd/8fd 1.7.10 silent mode input pin (s) this pin sets normal or silent mode. in silent mode, the transmitter is off and the high-speed receiver is active. the can bus common mode voltage is v dd /2 when in silent mode. the s pin (pin 8) is connected to an internal mos pull- up resistor to v dd or v io , in the mcp2557fd or mcp2558fd, respectively. the value of the mos pull- up resistor depends on the supply voltage. typical val- ues are 660 k ? for 5v, 1.1 m ? for 3.3v and 4.4 m ? for 1.8v 1.7.11 exposed thermal pad (ep) it is recommended to connect this pad to v ss to enhance electromagnetic immunity and thermal resistance. downloaded from: http:///
mcp2557fd/8fd ds20005533a-page 8 ? 2016 microchip technology inc. 1.8 typical application figure 1-2 shows a typical application for the mcp2557fd with the nc pin and a split termination. figure 1-3 illustrates a typical application for the mcp2558fd. figure 1-2: mcp2557fd with nc and split termination figure 1-3: mcp2558fd with v io pin 5v ldo v bat v dd v dd t xd r xd s cantx canrx rbx v ss v ss pic ? mcu mcp2557fd nc canh canl 0.1 f canh canl 4700 pf 60 60 3.3v ldo v dd v dd t xd r xd s cantx canrx rbx v ss v ss pic ? mcu mcp2558fd canh canl 5v ldo v bat v io 0.1 f 0.1 f canh canl 120 downloaded from: http:///
? 2016 microchip technology inc. ds20005533a-page 9 mcp2557fd/8fd 2.0 electrical characteristics 2.1 terms and definitions a number of terms are defined in iso/dis-11898 that are used to describe the electrical characteristics of a can transceiver device. these terms and definitions are summarized in this section. 2.1.1 bus voltage v canl and v canh denote the voltages of the bus line wires canl and canh relative to the ground of each individual can node. 2.1.2 common mode bus voltage range boundary voltage levels of v canl and v canh with respect to ground, for which proper operation will occur, if the maximum number of can nodes are connected to the bus. 2.1.3 differential internal capacitance, c diff (of a can node) capacitance seen between canl and canh during the recessive state when the can node is disconnected from the bus (see figure 2-1 ). 2.1.4 differential internal resistance, r diff (of a can node) resistance seen between canl and canh during the recessive state when the can node is disconnected from the bus (see figure 2-1 ). 2.1.5 differential voltage, v diff (of can bus) differential voltage of the two-wire can bus, with value equal to v diff =v canh Cv canl . 2.1.6 internal capacitance, c in (of a can node) capacitance seen between canl (or canh) and ground during the recessive state when the can node is disconnected from the bus (see figure 2-1 ). 2.1.7 internal resistance, r in (of a can node) resistance seen between canl (or canh) and ground during the recessive state when the can node is disconnected from the bus (see figure 2-1 ). figure 2-1: physical layer definitions r in r in r diff c in c in c diff canl canh ground ecu downloaded from: http:///
mcp2557fd/8fd ds20005533a-page 10 ? 2016 microchip technology inc. 2.2 absolute maximum ratings? v dd .............................................................................................................................................................................7.0v v io ..............................................................................................................................................................................7.0v dc voltage at t xd , r xd , s and v ss ....................................................................................................-0.3v to v io + 0.3v dc voltage at canh, and canl ................................................................................................... .............. -58v to +58v transient voltage on canh, and canl (iso/dis-7637) ( figure 2-5 ) ..................................................... -150v to +100v differential bus input voltage v diff (i) (t = 60 days, continuous)....................................................................-5v to +10v differential bus input voltage v diff (i) (1000 pulses, t = 0.1 ms, v canh = +18v).....................................................+17v dominant state detection v diff (i) (10000 pulses, t = 1 ms).......................................................................................+9v storage temperature ............................................................................................................ ...................-55c to +150c operating ambient temperature .................................................................................................. ............-40c to +150c virtual junction temperature, t vj (iec60747-1) ....................................................................................-40c to +190c soldering temperature of leads (10 seconds) .................................................................................... ...................+300c esd protection on canh and canl pins (iec 61000-4-2) ........................................................................... ........13 kv esd protection on canh and canl pins (iec 801; human body model)..............................................................8 kv esd protection on all other pins (iec 801; human body model)................................................................... ..........4 kv esd protection on all pins (iec 801; machine model) ............................................................................ ................400v esd protection on all pins (iec 801; charge device model) ...................................................................... ............750v ? notice: stresses above those listed under maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. exposure to maximum rating conditions for extended periods may affect device reliability. downloaded from: http:///
? 2016 microchip technology inc. ds20005533a-page 11 mcp2557fd/8fd table 2-1: dc characteristics dc specifications electrical characteristics: unless otherwise indicated, t amb = -40c to +150c; v dd = 4.5v to 5.5v, v io = 1.7v to 5.5v ( note 2 ), r l =60 ??? c l = 100 pf; unless otherwise specified. parameter sym. min. typ. max. units conditions supply v dd pin voltage range v dd 4.5 5.5 v supply current i dd 2 . 5 5 ma recessive; v txd =v dd 55 70 dominant; v txd =0v silent current i dds 1 3 ma mcp2557fd 1 3 mcp2558fd includes i io maximum supply current i ddmax 95 140 ma fault condition: v txd =v ss ; v canh =v can l = -5v to +18v high level of the por comparator for v dd v porh 3.0 3.95 v note 1 low level of the por comparator for v dd v porl 1.0 2.0 3.2 v note 1 hysteresis of por comparator for v dd v pord 0.2 0.9 2.0 v note 1 high level of the uv comparator for v dd v uvh 4.0 4.25 4.4 v low level of the uv comparator for v dd v uvl 3.6 3.8 4.0 v hysteresis of uv comparator v uvd 0 . 4 v note 1 v io pin digital supply voltage range v io 1.7 5.5 v supply current on v io i io 7 3 0 a recessive; v txd =v io 200 400 dominant; v txd =0v high level of the por comparator for v io v porh _ vio 0.8 1.2 1.7 v low level of the por comparator for v io v porl _ vio 0.7 1.1 1.4 v hysteresis of por comparator for v io v pord _ vio 0 . 2 v bus line (canh; canl) transmitter canh; canl: recessive bus output voltage v o ( r ) 2.0 0.5 v dd 3.0 v v txd = v dd ; no load recessive output current i o ( r )- 5 + 5m a - 2 4 v < v can <+24v canh: dominant output voltage v o ( d ) 2.75 3.50 4.50 v t xd =0; r l = 50 to 65 ? canl: dominant output voltage 0.50 1.50 2.25 r l = 50 ? to 65 ? driver symmetry (v canh +v canl )/v dd v sym 0.9 1.0 1.1 v 1 mhz square wave, recessive and dominant states, and transition ( note 1 ) note 1: characterized; not 100% tested. 2: only mcp2558fd has a v io pin. for mcp2557fd, v io is internally connected to v dd . 3: -12v to 12v is ensured by characterization, and tested from -2v to 7v. downloaded from: http:///
mcp2557fd/8fd ds20005533a-page 12 ? 2016 microchip technology inc. dominant: differential output voltage v o ( diff )( d ) 1.5 2.0 3.0 v v txd = v ss ; r l = 50 ? to 65 ? ( figure 2-2 , figure 2-4 ) ( note 1 ) 1.4 2.0 3.0 v txd = v ss ; r l = 45 ? to 70 ? ( figure 2-2 , figure 2-4, section 3 ) ( note 1 ) 1.3 2.0 3.0 v txd = v ss ; r l = 40 ? to 75 ? ( figure 2-2 , figure 2-4, section 3 ) 1.5 5.0 v txd = v ss ; r l = 2240 ? ( figure 2-2 , figure 2-4, section 3 ) ( note 1 ) recessive: differential output voltage v o ( diff )( r )-500 0 50 mvv txd = v dd , no load ( figure 2-2 , figure 2-4 ) canh: short-circuit output current i o ( sc )- 1 1 5- 8 5 m av txd = v ss ; v canh =-3v; canl: floating canl: short circuit output current 7 5+ 1 1 5m a v txd = v ss ; v canl = +18v; canh: floating bus line (canh; canl) receiver recessive differential input voltage v diff ( r )( i ) -4.0 +0.5 v -12v < v( canh , canl )<+12v; see figure 2-6 ( note 3 ) dominant differential input voltage v diff ( d )( i ) 0.9 9.0 v -12v < v( canh , canl )<+12v; see figure 2-6 ( note 3 ) differential receiver threshold v th ( diff ) 0.5 0.7 0.9 v -12v < v( canh , canl )<+12v; see figure 2-6 ( note 3 ) differential input hysteresis v hys ( diff ) 30 200 mv see figure 2-6 , ( note 1 ) single ended input resistance r can _ h , r can _ l 65 0k ? note 1 internal resistance matching m r =2*(r canh -r canl )/(r canh +r canl ) m r -3 0 +3 % v canh =v canl ( note 1 ) differential input resistance r diff 12 25 100 k ? note 1 internal capacitance c in 20 pf 1 mbps ( note 1 ) differential internal capacitance c diff 10 pf 1 mbps ( note 1 ) canh, canl: input leakage i li -5 +5 a v dd =v txd =v s =0v. for mcp2558fd , v io =0v. v canh =v canl =5 v. digital input pins (t xd , s) high-level input voltage v ih 2.0 v dd +0.3 v mcp2557fd 0.7 v io v io +0.3 mcp2558fd table 2-1: dc characteristics (continued) dc specifications electrical characteristics: unless otherwise indicated, t amb = -40c to +150c; v dd = 4.5v to 5.5v, v io = 1.7v to 5.5v ( note 2 ), r l =60 ??? c l = 100 pf; unless otherwise specified. parameter sym. min. typ. max. units conditions note 1: characterized; not 100% tested. 2: only mcp2558fd has a v io pin. for mcp2557fd, v io is internally connected to v dd . 3: -12v to 12v is ensured by characterization, and tested from -2v to 7v. downloaded from: http:///
? 2016 microchip technology inc. ds20005533a-page 13 mcp2557fd/8fd low-level input voltage v il -0.3 0.8 v mcp2557fd -0.3 0.3v io mcp2558fd high-level input current i ih -1 +1 a t xd : low-level input current i il ( txd ) -270 -150 -30 a s: low-level input current i il ( s )- 3 0 - 1 a receive data (r xd ) output high-level output voltage v oh v dd - 0.4 v mcp2557fd : i oh =-2ma; typical -4 ma v io - 0.4 mcp2558fd: v io = 2.7v to 5.5v, i oh =-1ma; v io = 1.7v to 2.7v, i oh =-0.5ma, typical -2 ma low-level output voltage v ol 0 . 4v i ol = 4ma; typical 8ma thermal shutdown shutdown junction temperature t j ( sd ) 165 175 185 c -12v < v( canh , canl )<+12v ( note 1 ) shutdown temperature hysteresis t j ( hyst ) 15 30 c -12v < v( canh , canl )<+12v ( note 1 ) table 2-1: dc characteristics (continued) dc specifications electrical characteristics: unless otherwise indicated, t amb = -40c to +150c; v dd = 4.5v to 5.5v, v io = 1.7v to 5.5v ( note 2 ), r l =60 ??? c l = 100 pf; unless otherwise specified. parameter sym. min. typ. max. units conditions note 1: characterized; not 100% tested. 2: only mcp2558fd has a v io pin. for mcp2557fd, v io is internally connected to v dd . 3: -12v to 12v is ensured by characterization, and tested from -2v to 7v. downloaded from: http:///
mcp2557fd/8fd ds20005533a-page 14 ? 2016 microchip technology inc. figure 2-2: physical bit representation and simplified bias implementation table 2-2: ac characteristics ac characteristics electrical characteristics: unless otherwise indicated, t amb = -40c to +150c; v dd = 4.5v to 5.5v, v io = 1.7v to 5.5v ( note 2 ), r l = 60 ??? c l = 100 pf. maximum v diff ( d )( i )=3v. param. no. parameter sym. min. typ. max. units conditions 1b i t t i m e t bit 0.125 69.44 s 2 nominal bit rate nbr 14.4 8000 kbps 3 delay t xd low to bus dominant t txd - buson 5 08 5n s note 1 4 delay t xd high to bus recessive t txd - busoff 4 08 5n s note 1 5 delay bus dominant to r xd t buson - rxd 7 08 5n s note 1 6 delay bus recessive to r xd t busoff - rxd 110 145 ns note 1 note 1: characterized, not 100% tested. 2: not in iso/dis-11898-2:2015, but needs to be characterized. canh, canl time canh canl normal mode silent mode recessive recessive dominant canl canh rx d v dd normal and silent unpowered recessive v dd /2 downloaded from: http:///
? 2016 microchip technology inc. ds20005533a-page 15 mcp2557fd/8fd 7 propagation delay t xd to r xd worst case of t loop ( r ) and t loop ( f ) figure 2-9 t txd - rxd 9 01 2 0 n s 115 150 r l = 150 ? , c l = 200 pf( note 1 ) 7a propagation delay, rising edge t loop ( r ) 90 120 ns 7b propagation delay, falling edge t loop ( f ) 80 120 ns 8a recessive bit time on r xd C 1 mbps, loop delay symmetry ( note 2 ) t bit ( rxd ), 1 m 900 985 1100 ns t bit ( txd ) = 1000 ns ( figure 2-9 ) 800 960 1255 t bit ( txd ) = 1000 ns ( figure 2-9 ), r l = 150 ? , c l = 200 pf ( note 1 ) 8b recessive bit time on r xd C 2 mbps, loop delay symmetry t bit ( rxd ), 2 m 450 490 550 ns t bit ( txd )=500ns ( figure 2-9 ) 400 460 550 t bit ( txd )=500ns ( figure 2-9 ), r l = 150 ? , c l = 200 pf ? ( note 1 ) 8c recessive bit time on r xd C 5 mbps, loop delay symmetry t bit ( rxd ), 5 m 160 190 220 ns t bit ( txd )=200ns ( figure 2-9 ) 8d recessive bit time on r xd C 8 mbps, loop delay symmetry ( note 2 ) t bit ( rxd ), 8 m 85 100 135 ns t bit ( txd )=120ns ( figure 2-9 ) ( note 1 ) 10 delay silent to normal mode t wake 7 30 s negative edge on s 11 permanent dominant detect time t pdt 0.8 1.9 5 ms t xd =0v 12 permanent dominant timer reset t pdtr 5 ns the shortest recessive pulse on t xd or can bus to reset permanent dominant timer 13a transmitted bit time on bus C 1 mbps ( note 2 ) t bit ( bus ), 1 m 870 1000 1060 ns t bit ( txd ) = 1000 ns ( figure 2-9 ) 870 1000 1060 t bit ( txd ) = 1000 ns ( figure 2-9 ), r l = 150 ? , c l =200pf ( note 1 ) 13b transmitted bit time on bus C 2 mbp t bit ( bus ), 2 m 435 515 530 ns t bit ( txd )=500ns ( figure 2-9 ) 435 480 550 t bit ( txd )=500ns ( figure 2-9 ) r l = 150 ? , c l = 200 pf ( note 1 ) table 2-2: ac characteristics (continued) ac characteristics electrical characteristics: unless otherwise indicated, t amb = -40c to +150c; v dd = 4.5v to 5.5v, v io = 1.7v to 5.5v ( note 2 ), r l = 60 ??? c l = 100 pf. maximum v diff ( d )( i )=3v. param. no. parameter sym. min. typ. max. units conditions note 1: characterized, not 100% tested. 2: not in iso/dis-11898-2:2015, but needs to be characterized. downloaded from: http:///
mcp2557fd/8fd ds20005533a-page 16 ? 2016 microchip technology inc. figure 2-3: test load conditions 13c transmitted bit time on bus C 5 mbps t bit ( bus ), 5 m 155 200 210 ns t bit ( txd ) = 200 ns ( figure 2-9 ) ( note 1 ) 13d transmitted bit time on bus - 8mbps ( note 2 ) t bit ( bus ), 8 m 100 125 140 ns t bit ( txd )=120ns ( figure 2-9 ) ( note 1 ) 14a receiver timing symmetry C 1 mbps ( note 2 ) t diff ( rec ), 1 m = t bit ( rxd ) - t bit ( bus ) -65 0 40 ns t bit ( txd ) = 1000 ns ( figure 2-9 ) -130 0 80 t bit ( txd ) = 1000 ns ( figure 2-9 ), r l = 150 ? , c l = 200 pf ( note 1 ) 14b receiver timing symmetry C 2 mbps t diff ( rec ), 2 m -65 0 40 ns t bit ( txd )=500ns ( figure 2-9 ) -70 0 40 t bit ( txd )=500ns ( figure 2-9 ), r l = 150 ? , c l = 200 pf ( note 1 ) 14c receiver timing symmetry C 5 mbps t diff ( rec ), 5 m -45 0 15 ns t bit ( txd )=200ns ( figure 2-9 ) ( note 1 ) 14d receiver timing symmetry C 8 mbps ( note 2 ) t diff(rec),8m t diff ( rec ), 8 m -45 0 10 ns t bit ( txd )=120ns ( figure 2-9 ) ( note 1 ) table 2-2: ac characteristics (continued) ac characteristics electrical characteristics: unless otherwise indicated, t amb = -40c to +150c; v dd = 4.5v to 5.5v, v io = 1.7v to 5.5v ( note 2 ), r l = 60 ??? c l = 100 pf. maximum v diff ( d )( i )=3v. param. no. parameter sym. min. typ. max. units conditions note 1: characterized, not 100% tested. 2: not in iso/dis-11898-2:2015, but needs to be characterized. v dd /2 c l r l pin pin v ss v ss c l r l =464 ? c l = 50 pf for all digital pins load condition 1 load condition 2 downloaded from: http:///
? 2016 microchip technology inc. ds20005533a-page 17 mcp2557fd/8fd figure 2-4: test circuit for electrical characteristics figure 2-5: test circuit for automotive transients figure 2-6: hysteresis of the receiver gnd r xd t xd r l c l 15 pf canh canl can transceiver 0.1 f v dd s note: on mcp2558fd, v io is connected to v dd . gnd r xd t xd r l 1000 pf 1000 pf note 1: on mcp2558fd, v io is connected to v dd . 2: the wave forms of the applied transients should comply with iso/dis-7637, part 1, test pulses 1, 2, 3a and 3b. canh canl can transceiver transient generator s v oh v ol 0.5 0.9 v diff ( h )( i ) v diff (v) r xd (receive data output voltage) v diff ( r )( i ) v diff ( d )( i ) downloaded from: http:///
mcp2557fd/8fd ds20005533a-page 18 ? 2016 microchip technology inc. 2.3 timing diagrams and specifications figure 2-7: timing diag ram for ac characteristics figure 2-8: permanent dominant timer reset detect 3 7 4 7 0v v dd t xd (transmit data input voltage) v diff (canh, canl differential voltage) r xd (receive data output voltage) 5 6 11 12 t xd v diff (v canh -v canl ) driver is off minimum pulse width until can bus goes to dominant state after the falling edge. downloaded from: http:///
? 2016 microchip technology inc. ds20005533a-page 19 mcp2557fd/8fd figure 2-9: timing diagram for loop delay symmetry 2.4 thermal specifications parameter sym. min. typ. max. units temperature ranges specified temperature range t a -40 +150 ? c operating temperature range t a -40 +150 ? c storage temperature range t a -65 +155 ? c package thermal resistances thermal resistance, 8ld dfn (3x3) ? ja 5 6 . 7 ? c/w thermal resistance, 8ld soic ? ja 1 4 9 . 5 ? c/w thermal resistance, 8ld tdfn (2x3) ? ja 5 3 ? c/w t xd 5*t bit ( txd ) t bit (t xd ) t bit (r xd ) r xd 8 30% 70% 30% 70% 30% v di ff _ bus t bit ( bus ) 13 500 mv 900 mv t loop ( r ) t loop ( f ) downloaded from: http:///
mcp2557fd/8fd ds20005533a-page 20 ? 2016 microchip technology inc. 3.0 typical performance curves figure 3-1: dominant differential output vs. rl (v dd =4.5v). figure 3-2: dominant differential output vs. rl (v dd =5.0v). figure 3-3: dominant differential output vs. rl (v dd =5.5v). note: the graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. the performance characteristics listed herein are not tested or guaranteed. in some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2 2.1 2.2 2.3 40 45 50 55 60 65 70 75 dominant differential output (v) rl ( ) -40 25 150 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2 2.1 2.2 2.3 40 45 50 55 60 65 70 75 dominant differential output (v) rl ( ) -40 25 150 1.6 1.7 1.8 1.9 2 2.1 2.2 2.3 2.4 2.5 2.6 40 45 50 55 60 65 70 75 dominant differential output (v) rl ( ) -40 25 150 downloaded from: http:///
? 2016 microchip technology inc. ds20005533a-page 21 mcp2557fd/8fd 4.0 packaging information 4.1 package marking information example: 8-lead dfn (03x03x0.9 mm) part number code mcp2557fdt-h/mf daeo mcp2557fd-h/mf daeo mcp2558fdt-h/mf daeq mcp2558fd-h/mf daeq daen 1609 256 example: 8-lead soic (150 mil) mcp2557 sn 1609 256 part number code mcp2557fdt-h/sn mcp2557 mcp2557fd-h/sn mcp2557 mcp2558fdt-h/sn mcp2558 mcp2558fd-h/sn mcp2558 legend: xx...x customer-specific information y year code (last digit of calendar year) yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week 01) nnn alphanumeric traceability code pb-free jedec ? ? designator for matte tin (sn) * this package is pb-free. the pb-free jedec ? designator ( ) can be found on the outer packaging for this package. note : in the event the full microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. 3 e 3 e example: 8-lead tdfn (02x03x0.8 mm) part number code mcp2557fdt-h/mny acz mcp2558fdt-h/mny ada acz 609 25 3 e downloaded from: http:///
mcp2557fd/8fd ds20005533a-page 22 ? 2016 microchip technology inc. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging downloaded from: http:///
? 2016 microchip technology inc. ds20005533a-page 23 mcp2557fd/8fd note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging downloaded from: http:///
mcp2557fd/8fd ds20005533a-page 24 ? 2016 microchip technology inc. downloaded from: http:///
? 2016 microchip technology inc. ds20005533a-page 25 mcp2557fd/8fd b a 0.15 c 0.15 c 0.10 c a b 0.05 c (datum b) (datum a) c seating plane note 1 12 n 2x top view side view bottom view note 1 12 n 0.10 c a b 0.10 c a b 0.10 c 0.08 c microchip technology drawing no. c04-129-mn rev d sheet 2 of 2 2x 8x for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging note: 8-lead plastic dual flat, no lead package (mn) C 2x3x0.75mm body [tdfn] d e d2 e2 a (a3) a1 e 8x b l k downloaded from: http:///
mcp2557fd/8fd ds20005533a-page 26 ? 2016 microchip technology inc. microchip technology drawing no. c04-129-mn rev d sheet 2 of 2 8-lead plastic dual flat, no lead package (mn) C 2x3x0.75mm body [tdfn] for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging note: nom millimeters 0.50 bsc2.00 bsc 3.00 bsc 0.20 ref 1. pin 1 visual index feature may vary, but must be located within the hatched area. bsc: basic dimension. theoretically exact value shown without tolerances. ref: reference dimension, usually without tolerance, for information purposes only. contact-to-exposed pad contact thickness exposed pad width exposed pad length 4. dimensioning and tolerancing per asme y14.5m 3. package is saw singulated 2. package may have one or more exposed tie bars at ends. notes: contact width overall width overall length contact length standoff number of pins overall height pitch k 0.20 units n e a dimension limits d a3 a1 b d2 e2 e l 0.20 1.451.60 0.25 0.00 0.70 min - - 0.250.30 - - 1.800.30 0.45 1.65 8 0.750.02 0.05 0.80 max downloaded from: http:///
? 2016 microchip technology inc. ds20005533a-page 27 mcp2557fd/8fd recommended land pattern dimension limits units optional center pad width optional center pad length contact pitch y2 x2 1.80 1.65 millimeters 0.50 bsc min e max contact pad length (x8) contact pad width (x8) y1 x1 0.85 0.25 microchip technology drawing no. c04-129-mn rev. a nom 8-lead plastic dual flat, no lead package (mn) C 2x3x0.75mm body [tdfn] 12 8 c contact pad spacing 2.90 thermal via diameter v thermal via pitch ev 0.30 1.00 bsc: basic dimension. theoretically exact value shown without tolerances. notes: dimensioning and tolerancing per asme y14.5m for best soldering results, thermal vias, if used, should be filled or tented to avoid solder loss during reflow process 1.2. for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging note: c e x1 y1 y2 x2 ev ev ?v silk screen downloaded from: http:///
mcp2557fd/8fd ds20005533a-page 28 ? 2016 microchip technology inc. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging downloaded from: http:///
? 2016 microchip technology inc. ds20005533a-page 29 mcp2557fd/8fd note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging downloaded from: http:///
mcp2557fd/8fd ds20005533a-page 30 ? 2016 microchip technology inc. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging downloaded from: http:///
? 2016 microchip technology inc. ds20005533a-page 31 mcp2557fd/8fd appendix a: revision history revision a (march 2016) initial release of this document. downloaded from: http:///
mcp2557fd/8fd ds20005533a-page 32 ? 2016 microchip technology inc. notes: downloaded from: http:///
? 2016 microchip technology inc. ds20005533a-page 33 mcp2557fd/8fd product identification system to order or obtain information, e. g., on pricing or delivery, refer to the factory or the listed sales office . part no. x /xx package temperature range device examples: a) mcp2558fdt-h/mf: tape and reel, 8-lead, plastic dual flat no lead dfn package. b) mcp2557fd-h/sn: 8-lead, plastic small outline soic pack- age. c) mcp2558fdt-h/mny:tape and reel, 8-lead, plastic dual flat no lead tdfn package. note1: tape and reel identifier only appears in the catalog part number description. this identifier is used for ordering purposes and is not printed on the device package. check with your microchip sales office for package availability with the tape and reel option. [x] (1) tape and reel option device: mcp2557fd: can fd transceiver w/no connect pin 5 mcp2558fd: can fd transceiver w/v io connect pin 5 tape and reel option: blank = standard packaging (tube or tray) t = tape and reel (1) temperature range: h= - 4 0 ? c to +150c package: mf = plastic dual flat no lead package C 3x3x0.9 mm body (dfn), 8-lead mny = plastic dual flat no lead package C 2x3x0.75 mm body (tdfn), 8-lead sn = plastic small outline (sn) C narrow, 3.90 mm, body (soic), 8-lead downloaded from: http:///
mcp2557fd/8fd ds20005533a-page 34 ? 2016 microchip technology inc. notes: downloaded from: http:///
? 2016 microchip technology inc. ds20005533a-page 35 information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. it is your responsibility to ensure that your application meets with your specifications. microchip makes no representations or warranties of any kind whether express or implied, written or oral, statutory or otherwise, related to the information, including but not limited to its condition, quality, performance, merchantability or fitness for purpose . microchip disclaims all liability arising from this information and its use. use of microchip devices in life support and/or safety applications is entirely at the buyers risk, and the buyer agrees to defend, indemnify and hold harmless microchip from any and all damages, claims, suits, or expenses resulting from such use. no licenses are conveyed, implicitly or otherwise, under any microchip intellectual property rights unless otherwise stated. trademarks the microchip name and logo, the microchip logo, anyrate, dspic, flashflex, flexpwr, heldo, jukeblox, keeloq, keeloq logo, kleer, lancheck, link md, medialb, most, most logo, mplab, optolyzer, pic, picstart, pic32 logo, righttouch, spynic, sst, sst logo, superflash and uni/o are registered trademarks of microchip technology incorporated in the u.s.a. and other countries. clockworks, the embedded control solutions company, ethersynch, hyper speed control, hyperlight load, intellimos, mtouch, precision edge, and quiet-wire are registered trademarks of microchip technology incorporated in the u.s.a. analog-for-the-digital age, any capacitor, anyin, anyout, bodycom, chipkit, chipkit logo, codeguard, dspicdem, dspicdem.net, dynamic average matching, dam, ecan, ethergreen, in-circuit serial programming, icsp, inter-chip connectivity, jitterblocker, kleernet, kleernet logo, miwi, motorbench, mpasm, mpf, mplab certified logo, mplib, mplink, multitrak, netdetach, omniscient code generation, picdem, picdem.net, pickit, pictail, puresilicon, righttouch logo, real ice, ripple blocker, serial quad i/o, sqi, superswitcher, superswitcher ii, total endurance, tsharc, usbcheck, varisense, viewspan, wiperlock, wireless dna, and zena are trademarks of microchip technology incorporated in the u.s.a. and other countries. sqtp is a service mark of microchip technology incorporated in the u.s.a. silicon storage technology is a registered trademark of microchip technology inc. in other countries. gestic is a registered trademar ks of microchip technology germany ii gmbh & co. kg, a subsidiary of microchip technology inc., in other countries. all other trademarks mentioned herein are property of their respective companies. ? 2016, microchip technology incorporated, printed in the u.s.a., all rights reserved. isbn: 978-1-5224-0443-9 note the following details of the code protection feature on microchip devices: microchip products meet the specification cont ained in their particular microchip data sheet. microchip believes that its family of products is one of the most secure families of its kind on the market today, when used i n the intended manner and under normal conditions. there are dishonest and possibly illegal methods used to breach the code protection feature. all of these methods, to our knowledge, require using the microchip products in a manner outside the operating specif ications contained in microchips data sheets. most likely, the person doing so is engaged in theft of intellectual property. microchip is willing to work with the customer who is concerned about the integrity of their code. neither microchip nor any other semiconduc tor manufacturer can guarantee the security of their code. code protection does not mean that we are guaranteeing the product as unbreakable. code protection is constantly evolving. we at microchip are co mmitted to continuously improvin g the code protection features of our products. attempts to break microchips code protection feature may be a violation of the digital millennium copyright act. if such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that act. microchip received iso/ts-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona; gresham, oregon and design centers in california and india. the company?s quality system processes and procedures are for its pic ? mcus and dspic ? dscs, k ee l oq ? code hopping devices, serial eeproms, microperipherals, nonvolatile memory and analog products. in addition, microchip?s quality system for the design and manufacture of development systems is iso 9001:2000 certified. quality management s ystem certified b y dnv == iso/ ts 1 6 9 4 9 == downloaded from: http:///
ds20005533a-page 36 ? 2016 microchip technology inc. americas corporate office 2355 west chandler blvd. chandler, az 85224-6199 tel: 480-792-7200 fax: 480-792-7277 technical support: http://www.micro- chip.com/support web address: www.microchip.com atlanta duluth, ga tel: 678-957-9614 fax: 678-957-1455 austin, tx tel: 512-257-3370 boston westborough, ma tel: 774-760-0087 fax: 774-760-0088 chicago itasca, il tel: 630-285-0071 fax: 630-285-0075 cleveland independence, oh tel: 216-447-0464 fax: 216-447-0643 dallas addison, tx tel: 972-818-7423 fax: 972-818-2924 detroit novi, mi tel: 248-848-4000 houston, tx tel: 281-894-5983 indianapolis noblesville, in tel: 317-773-8323 fax: 317-773-5453 los angeles mission viejo, ca tel: 949-462-9523 fax: 949-462-9608 new york, ny tel: 631-435-6000 san jose, ca tel: 408-735-9110 canada - toronto tel: 905-673-0699 fax: 905-673-6509 asia/pacific asia pacific office suites 3707-14, 37th floor tower 6, the gateway harbour city, kowloon hong kong tel: 852-2943-5100 fax: 852-2401-3431 australia - sydney tel: 61-2-9868-6733 fax: 61-2-9868-6755 china - beijing tel: 86-10-8569-7000 fax: 86-10-8528-2104 china - chengdu tel: 86-28-8665-5511 fax: 86-28-8665-7889 china - chongqing tel: 86-23-8980-9588 fax: 86-23-8980-9500 china - dongguan tel: 86-769-8702-9880 china - hangzhou tel: 86-571-8792-8115 fax: 86-571-8792-8116 china - hong kong sar tel: 852-2943-5100 fax: 852-2401-3431 china - nanjing tel: 86-25-8473-2460 fax: 86-25-8473-2470 china - qingdao tel: 86-532-8502-7355 fax: 86-532-8502-7205 china - shanghai tel: 86-21-5407-5533 fax: 86-21-5407-5066 china - shenyang tel: 86-24-2334-2829 fax: 86-24-2334-2393 china - shenzhen tel: 86-755-8864-2200 fax: 86-755-8203-1760 china - wuhan tel: 86-27-5980-5300 fax: 86-27-5980-5118 china - xian tel: 86-29-8833-7252 fax: 86-29-8833-7256 asia/pacific china - xiamen tel: 86-592-2388138 fax: 86-592-2388130 china - zhuhai tel: 86-756-3210040 fax: 86-756-3210049 india - bangalore tel: 91-80-3090-4444 fax: 91-80-3090-4123 india - new delhi tel: 91-11-4160-8631 fax: 91-11-4160-8632 india - pune tel: 91-20-3019-1500 japan - osaka tel: 81-6-6152-7160 fax: 81-6-6152-9310 japan - tokyo tel: 81-3-6880- 3770 fax: 81-3-6880-3771 korea - daegu tel: 82-53-744-4301 fax: 82-53-744-4302 korea - seoul tel: 82-2-554-7200 fax: 82-2-558-5932 or 82-2-558-5934 malaysia - kuala lumpur tel: 60-3-6201-9857 fax: 60-3-6201-9859 malaysia - penang tel: 60-4-227-8870 fax: 60-4-227-4068 philippines - manila tel: 63-2-634-9065 fax: 63-2-634-9069 singapore tel: 65-6334-8870 fax: 65-6334-8850 taiwan - hsin chu tel: 886-3-5778-366 fax: 886-3-5770-955 taiwan - kaohsiung tel: 886-7-213-7828 taiwan - taipei tel: 886-2-2508-8600 fax: 886-2-2508-0102 thailand - bangkok tel: 66-2-694-1351 fax: 66-2-694-1350 europe austria - wels tel: 43-7242-2244-39 fax: 43-7242-2244-393 denmark - copenhagen tel: 45-4450-2828 fax: 45-4485-2829 france - paris tel: 33-1-69-53-63-20 fax: 33-1-69-30-90-79 germany - dusseldorf tel: 49-2129-3766400 germany - karlsruhe tel: 49-721-625370 germany - munich tel: 49-89-627-144-0 fax: 49-89-627-144-44 italy - milan tel: 39-0331-742611 fax: 39-0331-466781 italy - venice tel: 39-049-7625286 netherlands - drunen tel: 31-416-690399 fax: 31-416-690340 poland - warsaw tel: 48-22-3325737 spain - madrid tel: 34-91-708-08-90 fax: 34-91-708-08-91 sweden - stockholm tel: 46-8-5090-4654 uk - wokingham tel: 44-118-921-5800 fax: 44-118-921-5820 worldwide sales and service 07/14/15 downloaded from: http:///

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